This certification helps you develop the skill sets that the industry demands. You will develop skills in system design, RTL design using Verilog, writing test benches in Verilog and development of basic / complex building blocks. You will be able to generate synthesised Netlist consisting of equivalent cells with their interconnection. It will conclude with an industry oriented project work.
Why should you do it?
Enhance your employability by developing skills that industry demands
Will have access to world class VLSI lab having industry standard tools (e.g. Synopsys)
Invest 2/3rd of your time on skill development through lab exercises & projects
Learncircuit concepts to program the logic Veriloglanguage
Design a basic building block using Verilog HDL
Design logic to meet specifications
Design combinational & sequential circuits using Verilog
Integrate combinational & sequential circuits to design a micro architecture
Set environment, libraries, synthesis constraints for synthesis
GenerateNetlistandanalyse synthesisreports for trade offs
Create test benches, run simulations and analyze/debug results to meet specifications
Building architectural building blocks using Verilog HDL
Synthesis flow, setting the environment & logical libraries, setting synthesis constraints, perform synthesis using EDA tools, analysing the synthesis reports
Principles of RTL Design
BE / B.Tech / ME / M.Tech (Electronics and related branches), working professionals, academic Faculty
Classes can be conducted physically / virtually. Depending on the students count, the classes will be conducted at Seer Office, Hyderabad or at other location physically. Online meeting software will be used for virtual classes.